Example embodiments of the inventive concepts relate to an inspection method, an inspection system, and/or a method of manufacturing a fan-out package using the same.
As semiconductor chips have been highly integrated, sizes of the semiconductor chips may be reduced. However, distances between bumps on the semiconductor chips may be set by international standards of an international standards association such as joint electron device engineering council (JEDEC). Thus, it may be difficult to adjust the numbers of the bumps of the semiconductor chips. In addition, as the sizes of the semiconductor chips are reduced, handling and testing of the semiconductor chips may be difficult. Furthermore, a board on which a semiconductor chip is mounted may be diversified based on a size of the semiconductor chip. To solve these, a fan-out package has been developed.
A fan-out packaging process may include a package of forming insulating layers and interconnection lines on a substrate on which a semiconductor chip is mounted. After the process of forming the insulating layers and the interconnection lines, an inspection process may be performed to check whether defects occur at the insulating layers and the interconnection lines. Conditions of the fan-out packaging process may be improved (or, alternatively, optimized) through the inspection process, and whether a defect of the fan-out package occurs may be checked in an early stage by the inspection process.